Event Details

The workshop will be conducted in 10 sessions comprising of various topics covering both analog and digital VLSI design flow. The workshop will cover in depth discussion with practical example and simulations with an emphasis on the fundamentals of digital logic circuits, basic analog building blocks, modelling of electronic devices along with the discussion on recent trends and research in microelectronics and VLSI design. Participants should fill up the Google form to complete Registration by 15th June 2022. There will be a selection interview for the candidates. After selection, the confirmed participants should deposit the registration fee as mentioned in the brochure. The TA, accommodation and foods will be borne by the Host Institute through SERB funding support.